Abstract
This paper proposes a 5.8 GHz highly efficient rectifier design using harmonic termination for wireless power transfer. The diode used to convert the received RF power to DC is a non-linear device, and a harmonic component is generated, which causes performance degradation. Therefore, in this paper, we designed a band stop filter for harmonic termination and proposed the N-stage harmonic terminated voltage multiplier (N-stage HTVM). The number of stages N can be designed differently to operate with high efficiency at various input powers for the proposed rectifier. In the proposed rectifier circuit, mathematical analysis of output DC voltage, power loss of the diode, and the power conversion efficiency (PCE) were evaluated through voltage/current waveform analysis of the diode. The design method of the filter for terminating harmonics is presented. Furthermore, the change of PCE according to the increase in the number of stages was analyzed using the equivalent model of the proposed circuit and verified through measurement. The maximum PCE of one-stage HTVM was 68% when 18 dBm of input power was applied. The DC output voltage was measured to 11.6 V. When the RF input power was 25 dBm and the load was 1500 Ω, the maximum PCE of the two-stage HTVM was 71% and the maximum DC output voltage was measured as 15.8 V. The measured performance of three-stage HTVM had a PCE of 67% and DC output voltage of 19.8 V when the input power was 30 dBm.