LAPSE:2023.3819
Published Article
LAPSE:2023.3819
Gate Driver Circuit with All-Magnetic Isolation for Cascode-Connected SiC JFETs in a Three-Level T-Type Bridge-Leg
Neville McNeill, Dimitrios Vozikis, Rafael Peña-Alzola, Shuren Wang, Richard Pollock, Derrick Holliday, Barry W. Williams
February 22, 2023
Abstract
This article presents a gate driver circuit with all-magnetic isolation for driving silicon carbide (SiC) power devices in a three-level T-type bridge-leg. Gate driver circuitry for SiC devices has to be tolerant of rapid common-mode voltage changes. With respect to the resultant potentially problematic common-mode current paths, an arrangement of transformers is proposed for supplying the power devices with drive signals and power for their local floating gate driver circuits. The high-frequency carrier phase-switching technique is used to reduce the number of transformers. Signal timing and other implementation issues are addressed when using this arrangement with the T-type converter. The circuit is demonstrated in a 540 V bridge-leg constructed around 650 V and 1200 V cascode-connected normally-on SiC junction field effect transistors (JFETs).
Keywords
cascode-connected, gate driver, isolation, JFET, silicon carbide, T-type converter
Subject
Suggested Citation
McNeill N, Vozikis D, Peña-Alzola R, Wang S, Pollock R, Holliday D, Williams BW. Gate Driver Circuit with All-Magnetic Isolation for Cascode-Connected SiC JFETs in a Three-Level T-Type Bridge-Leg. (2023). LAPSE:2023.3819
Author Affiliations
McNeill N: Department of Electronic and Electrical Engineering, University of Strathclyde, Glasgow G1 1XW, UK
Vozikis D: WSP, Glasgow G1 3BX, UK
Peña-Alzola R: Department of Electronic and Electrical Engineering, University of Strathclyde, Glasgow G1 1XW, UK
Wang S: Department of Electronic and Electrical Engineering, University of Strathclyde, Glasgow G1 1XW, UK [ORCID]
Pollock R: Technelec Limited, Oakham LE15 6QW, UK
Holliday D: Department of Electrical and Electronic Engineering, Newcastle University, Newcastle NE1 7RU, UK
Williams BW: Department of Electronic and Electrical Engineering, University of Strathclyde, Glasgow G1 1XW, UK
Journal Name
Energies
Volume
16
Issue
3
First Page
1226
Year
2023
Publication Date
2023-01-23
ISSN
1996-1073
Version Comments
Original Submission
Other Meta
PII: en16031226, Publication Type: Journal Article
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LAPSE:2023.3819
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https://doi.org/10.3390/en16031226
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Feb 22, 2023
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CC BY 4.0
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