LAPSE:2023.22331
Published Article

LAPSE:2023.22331
Realization of a Generalized Switched-Capacitor Multilevel Inverter Topology with Less Switch Requirement
March 24, 2023
Abstract
Conventional multilevel inverter topologies like neutral point clamped (NPC), flying capacitor (FC), and cascade H bridge (CHB) are employed in the industry but require a large number of switches and passive and active components for the generation of a higher number of voltage levels. Consequently, the cost and complexity of the inverter increases. In this work, the basic unit of a switched capacitor topology was generalized utilizing a cascaded H-bridge structure for realizing a switched-capacitor multilevel inverter (SCMLI). The proposed generalized MLI can generate a significant number of output voltage levels with a lower number of components. The operation of symmetric and asymmetric configurations was shown with 13 and 31 level output voltage generation, respectively. Self-capacitor voltage balancing and boosting capability are the key features of the proposed SCMLI structure. The nearest level control modulation scheme was employed for controlling and regulating the output voltage. Based on the longest discharging time, the optimum value of capacitance was also calculated. A generalized formula for the generation of higher voltage levels was also derived. The proposed model was simulated in the MATLABĀ®/Simulink 2016a environment. Simulation results were validated with the hardware implementation.
Conventional multilevel inverter topologies like neutral point clamped (NPC), flying capacitor (FC), and cascade H bridge (CHB) are employed in the industry but require a large number of switches and passive and active components for the generation of a higher number of voltage levels. Consequently, the cost and complexity of the inverter increases. In this work, the basic unit of a switched capacitor topology was generalized utilizing a cascaded H-bridge structure for realizing a switched-capacitor multilevel inverter (SCMLI). The proposed generalized MLI can generate a significant number of output voltage levels with a lower number of components. The operation of symmetric and asymmetric configurations was shown with 13 and 31 level output voltage generation, respectively. Self-capacitor voltage balancing and boosting capability are the key features of the proposed SCMLI structure. The nearest level control modulation scheme was employed for controlling and regulating the output voltage. Based on the longest discharging time, the optimum value of capacitance was also calculated. A generalized formula for the generation of higher voltage levels was also derived. The proposed model was simulated in the MATLABĀ®/Simulink 2016a environment. Simulation results were validated with the hardware implementation.
Record ID
Keywords
capacitor voltage balancing, multilevel inverter (MLI), switch count, switched-capacitor cell
Subject
Suggested Citation
Ahmad A, Anas M, Sarwar A, Zaid M, Tariq M, Ahmad J, Beig AR. Realization of a Generalized Switched-Capacitor Multilevel Inverter Topology with Less Switch Requirement. (2023). LAPSE:2023.22331
Author Affiliations
Ahmad A: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India
Anas M: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India [ORCID]
Sarwar A: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India [ORCID]
Zaid M: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India
Tariq M: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India [ORCID]
Ahmad J: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India [ORCID]
Beig AR: Advanced Power and Energy Center, Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi 127788, UAE [ORCID]
Anas M: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India [ORCID]
Sarwar A: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India [ORCID]
Zaid M: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India
Tariq M: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India [ORCID]
Ahmad J: Department of Electrical Engineering, ZHCET, Aligarh Muslim University, Aligarh, Uttar Pradesh 202002, India [ORCID]
Beig AR: Advanced Power and Energy Center, Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi 127788, UAE [ORCID]
Journal Name
Energies
Volume
13
Issue
7
Article Number
E1556
Year
2020
Publication Date
2020-03-27
ISSN
1996-1073
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Original Submission
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PII: en13071556, Publication Type: Journal Article
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LAPSE:2023.22331
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https://doi.org/10.3390/en13071556
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Mar 24, 2023
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Mar 24, 2023
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